--library ieee; use ieee.std_logic_1164.all;
--package mypackage is
--constant n: natural := 8;
--constant m: natural := 239;
--constant c: natural := 17;
--constant zero: std_logic_vector(n-1 downto 0) := ('0', others => '0');
--end mypackage;

library ieee; use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--use work.mypackage.all;
entity mod_239 is
port 
(x: in std_logic_vector(15 downto 0);
z: out std_logic_vector(7 downto 0)
);
end mod_239;

architecture circuit of mod_239 is
signal x1_by_17, x0, sum, xx1_by_17, xx0, xxx: std_logic_vector(8 downto 0);
signal long_xxx, minus_239, dif: std_logic_vector(9 downto 0);
signal x2_by_33, long_sum, xx: std_logic_vector(9 downto 0);
begin
x1_by_17 <= '0'&x(11 downto 8)&x(11 downto 8);
x0 <= '0'&x(7 downto 0);
sum <= x1_by_17 + x0;
x2_by_33 <= '0'&x(15 downto 12)&'0'&x(15 downto 12);
long_sum <= '0'&sum;
xx <= x2_by_33 + long_sum;
xx1_by_17 <= "000"&xx(9 downto 8) &"00"&xx(9 downto 8);
xx0 <= '0'&xx(7 downto 0);
xxx <= xx1_by_17 + xx0;
minus_239 <= conv_std_logic_vector(273, 10);
long_xxx <= '0'&xxx;
dif <= long_xxx + minus_239;
with dif(9) select z <= dif(7 downto 0) when '1', xxx(7 downto 0) when others;
end circuit;



library ieee; use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use work.mypackage.all;
entity test_mod_239 is end test_mod_239;

architecture test of test_mod_239 is
component mod_239
port 
(x: in std_logic_vector(15 downto 0);
z: out std_logic_vector(7 downto 0)
);
end component;
signal a, b: std_logic_vector(7 downto 0);
signal x: std_logic_vector(15 downto 0);
signal z: std_logic_vector(7 downto 0);
begin
device_under_test: mod_239 port map(x, z);
a <= conv_std_logic_vector(227, n), 
conv_std_logic_vector(14, n) after 100 ns, 
conv_std_logic_vector(210, n) after 200 ns,
conv_std_logic_vector(45, n) after 300 ns,
conv_std_logic_vector(0, n) after 400 ns,
conv_std_logic_vector(238, n) after 500 ns,
conv_std_logic_vector(238, n) after 600 ns;
b <= conv_std_logic_vector(198, n), 
conv_std_logic_vector(211, n) after 100 ns, 
conv_std_logic_vector(46, n) after 200 ns,
conv_std_logic_vector(126, n) after 300 ns,
conv_std_logic_vector(0, n) after 400 ns,
conv_std_logic_vector(0, n) after 500 ns,
conv_std_logic_vector(238, n) after 600 ns;
x <= a*b;
end test;