
/*******************************************************************
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 13.1 EDK_O.40d
* DO NOT EDIT.
*
* Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.

* 
* Description: Profiling Configuration parameters
*
*******************************************************************/

#ifndef _PROFILE_CONFIG_H
#define _PROFILE_CONFIG_H

#define BINSIZE 4
#define CPU_FREQ_HZ 100000000
#define SAMPLE_FREQ_HZ 100000
#define TIMER_CLK_TICKS 1000
#define PROC_MICROBLAZE 1
#define PROFILE_TIMER_BASEADDR 0x83C00000
#define ENABLE_SYS_INTR 1

#endif

/******************************************************************/

