Xilinx Design Summary

system Project Status
Project File: | system.xmp | Implementation State: | New

Module Name:

system

- Errors:

Product Version:

EDK 13.1

- Warnings:

XPS Reports | [-]
Report Name | Generated | Errors | Warnings | Infos
Platgen Log File |  |  |  |
Libgen Log File |  |  |  |
Simgen Log File |  |  |  |
BitInit Log File | vie 1. jul 16:50:56 2011 |  |  |
System Log File | lun 30. ene 14:59:36 2012 |  |  |

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Translation Report |  |  |  |  |
Map Report |  |  |  |  |
Place and Route Report |  |  |  |  |
Post-PAR Static Timing Report |  |  |  |  |
Bitgen Report |  |  |  |  |

Secondary Reports | [-]
Report Name | Status | Generated

Date Generated: 01/30/2012 - 14:59:36